A. Field of the Invention
The present invention relates generally to insulated gate semiconductor devices and, more particularly, to trench-type insulated gate bipolar transistors (hereinafter referred to as “trench IGBTs”), which include an insulated gate structure in the trenches formed in a semiconductor substrate.
B. Description of the Related Art
Recently, trench IGBTs have been attracting much attention in the field of power devices used for electric power converters. Since the trench IGBT facilitates increased trench density, the voltage drop VCE(sat) in the ON-state of the trench IGBT is small and the steady state losses are reduced. However, since the capacitance between the gate electrode and the emitter electrode, and the capacitance between the gate electrode and the collector electrode (hereinafter referred to as the “gate-collector capacitance”), are large, large switching losses are caused by the turning-on and turning-off of the trench IGBT.
It has been reported that the tradeoff relation between the saturation voltage and the turn-off losses in the trench IGBT is reduced by disposing p-type well regions not in electrical contact with the emitter electrode to increase the accumulated carrier density on the emitter electrode side (cf. JP P2000-228519A at page 4, left-hand column, last line). Trench IGBTs including p-type well regions not in electrical contact with the emitter electrode also have been disclosed in JP P2001-308327A (FIGS. 1 and 7), JP PHei.9(1997)-331063A (FIG. 42), JP P2002-100770A (FIG. 22), and JP P2002-16252A (FIG. 1).
FIG. 18 is a top plan view schematically showing a trench IGBT having a structure as described above. FIG. 19 is a cross-sectional view of the trench IGBT along the line segment A-A of FIG. 18. In FIG. 18, p-type base regions 9 and 10, n-type source regions 3, gate electrodes 5, and gate runners 13 and 14 are shown. Gate insulator films 4, interlayer insulator films 6, and emitter electrode 7 are not shown in FIG. 18. In FIG. 19, the cross section along the line segment A-A, that is, the structure across n-type source regions 3 and gate electrodes 5, is shown together with the constituent elements not shown in FIG. 18.
As shown in FIGS. 18 and 19, n-type drift layer 2 is on p-type collector layer 1 and p-type base layer 20 is on n-type drift layer 2. P-type base layer 20 is divided into p-type base regions 9 and 10 by trenches 21. N-type source region 3 is on the side of trench 21 in narrow p-type base region 9. An n-type source region 3 is not disposed in wide p-type base region 10.
Emitter electrode 7 is in contact with n-type source regions 3 and p-type base region 9. Emitter electrode 7 is insulated by interlayer insulator film 6 from p-type type base region 10 including no n-type source region 3. Trench 21 is filled with gate electrode 5 with gate insulator film 4 interposed between them. As shown in FIG. 18, gate electrodes 5 are connected electrically to gate runners 13 extending across the terminal ends of trenches 21. Gate runners 13 are connected to a gate pad (not shown).
In the above-described structure including only gate runners 13 across both ends of trenches 21, the gate electrode resistance between gate runners 13 and the center of the active region, in which the main current of the semiconductor device is made to flow, increases as the chip size increases. To obviate this problem, gate runners 14 are disposed in the active region with a spacing of between 2 and 4 mm. Although not shown in the figures, a structure for sustaining the breakdown voltage including guard rings and such means is disposed around the active region.
FIG. 20 is a top plan view schematically showing the other conventional trench IGBT. FIG. 21 is a cross sectional view of the other trench IGBT along the line segment B-B of FIG. 20. In the trench IGBT shown in FIGS. 20 and 21, p-type base layer 20 is divided into p-type base regions 9 and 12 by trenches 21. Emitter electrode 7 is in contact also with p-type base region 12, not including any p-type source region therein, via contact holes 11 formed through interlayer insulator film 6 (cf JP P2001-308327A). Contact hole 11 is 2 μm×2 μm in cross sectional area, and is disposed near the terminal end of trench 21.
In FIG. 20, p-type base regions 9 and 12, n-type source regions 3, gate electrodes 5, gate runners 13 and 14, and contact holes 11 projected to the surfaces of p-type base regions 12 are shown. Gate insulator films 4, interlayer insulator films 6, and emitter electrode 7 are not shown in FIG. 20. In FIG. 21, the cross section along the line segment B-B of FIG. 20, that is the structure across n-type source regions 3, gate electrodes 5 and contact holes 11, is shown together with the constituent elements not shown in FIG. 20.
By optimizing the surface structure including trenches 21, that is by optimizing the surface structure including gate electrodes 5, it is possible for the trench IGBTs described above to realize low steady state losses and low switching losses (high speed switching) simultaneously. The trench IGBT, having the structure described in FIG. 21, facilitates preventing the breakdown voltage from decreasing as compared with the trench IGBT having the structure described in FIG. 19.
When the chip size for any of the trench IGBTs described above is so large that it is necessary to dispose gate runner 14 in the active region, the result is a large gate-collector capacitance across the boundaries between p-type base regions 10 or 12 not including any source region 3 and gate insulator films 4 in the central part of the active region. Since the voltage drop speed and the current increase speed become slow in the turning-on of the trench IGBTs due to the large gate-collector capacitance, large turn-on losses are caused. For preventing the turn-on losses from increasing, it is necessary to improve the gate-voltage change-over capabilities of the switching devices for gate driving or the ICs for gate driving. Therefore, it is impossible to use the conventional devices for gate driving.
Recently, it has been required to reduce the radiation noise caused by switching for power devices. To reduce the radiation noise, it is necessary to reduce the voltage drop speed (dV/dt) and the current increase speed (di/dt). Therefore, it is hard to reduce the radiation noises and the switching losses simultaneously. Since a tradeoff exists between the turn-on losses and the radiation noise as described above, it is impossible for the trench IGBTs having any of the conventional structures to obtain an optimum structure that meets the specifications for turn-on losses and radiation noise.
It has been reported that the device characteristics exhibited by the IGBT turning on at a low current of about one-tenth the rated current greatly affects radiation noise (S. Momota, et al. “Analysis on the Low Current Turn-On Behavior of IGBT Modules,” Proc. ISPSD2000, 359-362 (2000)). Tremendous efforts are necessary to suppress the radiation noise caused, especially that in the frequency range of 30 MHz or higher below the reference level. It has been reported that radiation noise is caused in the frequency range of 30 MHz or higher by a high (dV/dt) containing high frequency components. To suppress the (dV/dt) in the switching of an inverter below the reference value, the gradient of the main current (dIc/dt) is suppressed at a low value by adjusting the gate resistance and such parameters.
However, high gate resistance increases the turn-on losses of the IGBT. FIG. 11 is a wave chart describing the simulation results for comparing the turn-on characteristics of the IGBT shown in FIG. 8 and the conventional IGBTs with the gate resistance values thereof changed. As shown in FIG. 11, the gradient (di/dt) of the current during the turn-on of the IGBT (hereinafter referred to as the “turn-on current-change-speed”) is reduced by increasing the gate resistance. Although the gate resistance increase is preferable to reduce the radiation noise, switching losses increase, since the gate resistance increase causes long tails in the voltage waveforms. Therefore, it is preferable for the trench IGBT to realize a low (di/dt) while suppressing the gate resistance as low as possible.
In view of the foregoing, it would be desirable to obviate the problems described above. It would be also desirable to provide an insulated gate semiconductor device that facilitates meeting the specifications on the turn-on losses and the switching noises simultaneously. The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.